About company:
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
Synopsys is looking for engineering graduates/PG students to work as interns in the field of VLSI.
The focus of work would be VLSI design/Verification in one of the following areas related to connectivity protocols: USB/Ethernet/AMBA/MIPI/Memory Controllers
JOB: Intern
EDUCATION: BE/ B.Tech
EXPERIENCE : Fresher
SALARY: Best in industry
JOB LOCATION: Bangalore,India
LAST DATE TO APPLY: Soon
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• Architecture exploration of the sub-blocks within one of these IPs to optimize for area, speed and power
• VLSI Design & verification of these sub-blocks/exploration of latest features and standards.
• Exposure to UVM methodology, working with EDA tools like Design Compiler for Synthesis, SpyGlass for Lint, VCS for simulation. Key Qualifications
• Based on project assigned, the job would involve one or more of the following activities: Verilog/System Verilog/ Vera coding.
• Must have completed Bachelor’s Degree in Electronics/ Electrical Engineering.
• Partial completion of MS/MTech preferable.
(Electrical/Electronics/VLSI/MicroElectronics or allied specializations.)
• Strong fundamentals in Digital electronics.
• Minimum 7.0 CGPA/ 70% in Bachelor’s in Engineering and 7.5 CGPA in Master’s till the current semester.
• Need to be backed with consistently high academics in 10th std and 12th standard. Preferred Experience
• HDL Languages coding experience preferably in Verilog/Vera/System Verilog.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability
Application fees:
1) No fees to get hired.
Reservation:
1) Not applicable as this is a public limited company.
Mode of application:
1) Through online only by clicking apply now button.
Selection Process:
1) Based on an interview with the interview panel.
How to Apply for SynopsysOff Campus Drive 2021?
Interested and eligible candidates can apply by following links.
APPLY LINK: click here
Accenture off-campus Drive 2020 freshers: Click here
IBM Off Campus Drive 2021 : Click here
INFOSYS Fresher's Registration Drive 2021 : Click here
Important Note:
We are never asking for any money regarding a job placement nor encourage about the same, be careful and do not pay any amount for any job apply or career placement and only apply for job by this company’s official website.
All the best......
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